The present invention relates to a semiconductor device including a protection element and a ballast resistance for preventing breakdown due to over-current or over-voltage such as electrostatic discharge (ESD).
A ballast resistance may be provided to a protection element that protects an internal circuit from over current and over-voltage. It is known that the ballast resistance has an effect to improve discharge performance of the protection element by preventing current flowing in the protection element from concentrating in a certain portion and improving the uniformity of the current.
On the other hand, Japanese Unexamined Patent Application Publication No. 2002-76279 discloses the technique described below. First, an insulating region is formed in a silicon layer of an SOI substrate and an island-shaped semiconductor region is formed inside the insulating region. The semiconductor region has a crooked pattern in a plan view. One end of the semiconductor region is a p+ region and the other end is an n+ region. The other region of the semiconductor region is an n region. In other words, the semiconductor region not only functions as a diode, but also functions as a resistance by the n region. A plurality of the semiconductor regions are arranged in a matrix form and the semiconductor regions are coupled in parallel.